1 white electronic designs corporation ? (602) 437-1520 ? www.whiteedc.com white electronic designs ws1m8-xxx july 2004 rev. 5 white electronic designs corp. reserves the right to change products or speci cations without notice. 2x512kx8 dualithic? sram features ? access times 17, 20, 25, 35, 45, 55ns ? revolutionary, center power/ground pinout ? packaging: ? 32 pin, her met ic ceramic dip (package 300) ? 36 lead ceramic soj (package 100) ? 36 lead ceramic flatpack (package 226) 36 csoj 36 flatpack top view 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 20 19 a0 a1 a2 a3 a4 cs1# i/o0 i/o1 v cc gnd i/o2 i/o3 we# a5 a6 a7 a8 a9 nc a18 a17 a16 a15 oe# i/o7 i/o6 gnd v cc i/o5 i/o4 a14 a13 a12 a11 a10 cs2# block diagram 512k x 8 512k x 8 a0-18 oe# we# cs1# cs2# i/o0-7 (1) (1) pin configuration for ws1m8-xdjx and ws1m8-xfx pin description a0-18 address inputs i/o0-7 data input/output cs1-2# chip selects oe# output enable we# write enable v cc +5.0v power gnd ground note: 1. cs1# and cs2# are used to select the lower and upper 512kx8 of the device. cs1# and cs2# must not be enabled at the same tim e. ? organized as two banks of 512kx8 ? commercial, industrial and military temperature ranges ? 5 volt power supply ? low power cmos ? ttl compatible inputs and outputs pin configuration for ws1m8-xcx 32 dip top view 512k x 8 512k x 8 a0-18 we# cs 1# cs 2# i/o0-7 (1) (1) 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 a18 a16 a14 a12 a7 a6 a5 a4 a3 a2 a1 a0 i/o0 i/o1 i/o2 gnd v cc a15 a17 we # a13 a8 a9 a11 cs2 # a10 cs1 # i/o7 i/o6 i/o5 i/o4 i/o3 pin description a0-18 address inputs i/o0-7 data input/output cs1-2# chip selects we# write enable v cc +5.0v power gnd ground block diagram
2 white electronic designs corporation ? (602) 437-1520 ? www.whiteedc.com white electronic designs ws1m8-xxx july 2004 rev. 5 white electronic designs corp. reserves the right to change products or speci cations without notice. absolute maximum ratings parameter symbol min max unit operating temperature t a -55 +125 c storage temperature t stg -65 +150 c signal voltage relative to gnd v g -0.5 v cc +0.5 v junction temperature t j 150 c supply voltage v cc -0.5 7.0 v truth table cs# oe# we# mode data i/o power h x x standby high z standby l l h read data out active l x l write data in active l h h out disable high z active note: oe# is internally tied to the gnd and not accessible on the ws1m8-xcxx. recommended operating conditions parameter symbol min max unit supply voltage v cc 4.5 5.5 v input high voltage v ih 2.2 v cc + 0.3 v input low voltage v il -0.3 +0.8 v operating temp. (mil.) t a -55 +125 c capacitance t a = +25c parameter symbol condition max unit input capacitance c in v in = 0v, f = 1.0mhz 20 pf output capicitance c out v out = 0v, f = 1.0mhz 20 pf this parameter is guaranteed by design but not tested. dc characteristics v cc = 5.0v, v ss = 0v, -55c t a +125c parameter sym conditions min max units input leakage current i li v cc = 5.5, v in = gnd to v cc 10 a output leakage current i lo 1 cs# = v ih , oe# = v ih , v out = gnd to v cc 10 a operating supply current i cc 1 cs# = v il , oe# = v ih , f = 5mhz, v cc = 5.5 180 ma standby current i sb 1 cs# = v ih , oe# = v ih , f = 5mhz, v cc = 5.5 40 ma output low voltage v ol i ol = 6ma 0.4 v output high voltage v oh i oh = -4.0ma 2.4 v note: dc test conditions: v ih = v cc -0.3v , v il = 0.3v 1. oe# is internally tied to the gnd and not accessible on the ws1m8-xcxx.
3 white electronic designs corporation ? (602) 437-1520 ? www.whiteedc.com white electronic designs ws1m8-xxx july 2004 rev. 5 white electronic designs corp. reserves the right to change products or speci cations without notice. i current source d.u.t. c = 50 pf eff i ol v 1.5v (bipolar supply) z current source oh ac test circuit ac test conditions parameter typ unit input pulse levels vil = 0, vih = 3.0 v input rise and fall 5 ns input and output reference level 1.5 v output timing reference level 1.5 v notes: v z is programmable from -2v to +7v. i ol & i oh programmable from 0 to 16ma. tester impedance z0 = 75 . v z is typically the midpoint of v oh and v ol . i ol & i oh are adjusted to simulate a typical resistive load cir cuit. ate tester includes jig capacitance. ac characteristics v cc = 5.0v, v ss = 0v, -55c t a +125c parameter read cycle symbol -17 -20 -25 -35 -45 -55 units min max min max min max min max min max min max read cycle time t rc 17 20 25 35 45 55 ns address access time t aa 17 20 25 35 45 55 ns output hold from address change t oh 000000ns chip select access time t acs 17 20 25 35 45 55 ns output enable to output valid t oe 2 9 1012252525ns chip select to output in low z t clz 1 222444ns output enable to output in low z t olz 2 000000ns chip disable to output in high z t chz 1 9 1012152020ns output disable to output in high z t ohz 2 9 1012152020ns 1. this parameter is guaranteed by design but not tested. 2. oe# is internally tied to the gnd and not accessible on the ws1m8-xcxx. ac characteristics v cc = 5.0v, v ss = 0v, -55c t a +125c parameter write cycle symbol -17 -20 -25 -35 -45 -55 units write cycle time t wc 17 20 25 35 45 55 ns chip select to end of write t cw 14 14 15 25 35 50 ns address valid to end of write t aw 14 14 15 25 35 50 ns data valid to end of write t dw 9 1010202525ns write pulse width t wp 14 14 15 25 35 40 ns address setup time t as 000000ns address hold time t ah 000055ns output active from end of write t ow 1 234455ns write enable to output in high z t whz 1 9 9 10 15 15 25 ns data hold time t dh 000000ns 1. this parameter is guaranteed by design but not tested.
4 white electronic designs corporation ? (602) 437-1520 ? www.whiteedc.com white electronic designs ws1m8-xxx july 2004 rev. 5 white electronic designs corp. reserves the right to change products or speci cations without notice. timing waveform ? read cycle write cycle ? cs# controlled address data i/o write cycle 2, cs# controlled t aw t as t cw t ah t wp t dh t dw t wc cs# we# data valid address data i/o read cycle 2 (we# = v ih ) t aa t acs t oe t clz t olz t ohz t rc data valid high impedance cs# oe# t chz address data i/o read cycle 1 (cs# = oe# = v il , we# = v ih ) t aa t oh t rc data valid previous data valid note: oe# is internally tied to the gnd and not accessible on the ws1m8-xcxx. write cycle ? we# con trolled address cs# we# t as t wp t cw t aw t wc t ah t ow t dh data valid t dw t whz data i/o write cycle 1, we# controlled
5 white electronic designs corporation ? (602) 437-1520 ? www.whiteedc.com white electronic designs ws1m8-xxx july 2004 rev. 5 white electronic designs corp. reserves the right to change products or speci cations without notice. package 100: 36 lead, ceramic soj 1.27 (0.050) typ 23.37 (0.920) 0.25 (0.010) pin 1 identifier 21.59 (0.850) typ 11.3 (0.446) 0.2 (0.009) 0.43 (0.017) 0.05 (0.002) 4.76 (0.184) max 0.89 (0.035) radius typ 0.20 (0.008) 0.05 (0.002) 9.55 (0.376) 0.25 (0.010) 1.27 (0.050) 0.25 (0.010) package 226: 36 lead, ceramic flat pack all linear dimensions are millimeters and parenthetically in inches 23.37 (0.920) 0.25 (0.010) 32.64 (1.285) typ 12.95 (0.510) 0.13 (0.005) 3.8 (0.150) typ 3.18 (0.125) max 0.127 (0.005) 0.05 (0.002) pin 1 identifier 1.27 (0.050) typ 21.59 (0.850) typ 38.1 (1.50) 0.4 (0.015) 12.7 (0.500) 0.5 (0.020) 5.1 (0.200) 0.25 (0.010) 0.43 (0.017) 0.05 (0.002) all linear dimensions are millimeters and parenthetically in inches
6 white electronic designs corporation ? (602) 437-1520 ? www.whiteedc.com white electronic designs ws1m8-xxx july 2004 rev. 5 white electronic designs corp. reserves the right to change products or speci cations without notice. ordering information package 300: 32 pin, ceramic dip, single cavity side brazed 42.4 (1.670) 0.4 (0.016) pin 1 identifier 0.84 (0.033) 0.4 (0.014) 4.34 (0.171) 0.79 (0.031) 15.04 (0.592) 0.3 (0.012) all linear dimensions are millimeters and parenthetically in inches lead finish: blank = gold plated leads a = solder dip leads device grade: m = military screened -55c to +125c i = industrial -40c to +85c c = commercial 0c to +70c package: c = 32 pin ceramic 0.600" dip (package 300) dj = 36 lead ceramic soj (package 100) f = 36 lead ceramic flatpack (package 226) access time (ns) improvement mark: blank = standard power organization, two banks of 512k x 8 sram white electronic designs corp. w s 1m8 x - xxx x x x
|
